1. Field of the Invention
The present invention relates to a heat radiation technique of a semiconductor element and, more particularly, to a heat radiation technique for a high-output semiconductor element such as a power FET (field effect transistor).
2. Description of the Related Art
In radio communication systems such as W-CDMA (Wideband Code Division Multiple Access), power FETs of hundreds of watts class are used in sending radio waves.
In the design of a power amplifier in which such high-output semiconductor elements, such as power FETs of hundreds of watts class, are used, how efficiently the heat generated by the semiconductor elements that are used is radiated becomes a very important problem. This is because if heat radiation is insufficient and heat is stored in the interior of semiconductor elements, the semiconductor elements cause deterioration in electrical properties, for example, it becomes impossible to obtain a sufficient saturation output and in some cases the semiconductor elements are damaged by heat.
In general, in order to obtain a sufficient heat radiation effect, a power FET of hundreds of watts class is not of a surface mount type structure and has such a structure that the rear surface of a source electrode of the power FET can come into direct contact with a heat sink attached outside the power FET. In general, however, the rear surface of a source electrode is not excellent in flatness and micro irregularities are present on the rear surface of a source electrode. Therefore, if the rear surface of a source electrode is brought into contact with a heat sink as it is and the rear surface is screwed, the air enters gaps formed by the micro irregularities, posing the problem that a sufficient heat radiation effect cannot be obtained.
As techniques for solving this problem and improving heat radiation characteristics, there have been proposed a technique that involves soldering the rear surface of a source electrode of a power FET to a heat sink and a technique that involves applying a thermal grease to between the rear surface of a source electrode of a power FET and a heat sink (for example, Japanese Utility Model Laid-Open No. 5-62048 and Japanese Patent Laid-Open No. 4-167455).
However, the above-described technique that involves soldering has the problem that this technique is not suitable for mass production, because the work of soldering the surface of a source electrode to a heat sink having a large surface area cannot be easily performed. Also, the above-described technique that involves applying a thermal grease has the problem that this technique is not suitable for mass production because the application amount and application area of the thermal grease, etc. have a critical effect on heat radiation characteristics and electrical properties, and has the problem that it is difficult to ensure long-period reliability of the thermal grease.
On the other hand, a structure of a power FET that does not use the above-described soldering or thermal grease and is attached by inserting a thermal conductive sheet excellent in thermal conductivity between the power FET and a heat sink is proposed in the Japanese Patent Laid-Open No. 11-204700, for example.
An appearance view of a general power FET is shown in FIG. 1. An example of a heat radiation structure of a conventional power FET is shown in FIG. 2 to FIG. 5. FIG. 2 is an appearance perspective view of a conventional power FET. FIG. 3 is an assembly drawing of a conventional power FET. FIG. 4 and FIG. 5 are each a sectional view taken along the line VII-VII of FIG. 2.
In FIG. 2 to FIG. 5, a power FET 1, which is a semiconductor element, is the power FET of FIG. 1. The power FET 1 is constituted by a case 1A in the shape of a rectangular parallelepiped, a gate electrode 2A that is a metal plate provided so as to project from a side of this case 1A, a drain electrode 2B that is a metal plate provided so as to project from a side on the side opposite to the gate electrode 2A of the case 1A, and a source electrode 3 that is a metal plate provided on the bottom surface of the case 1A. The source electrode 3 projects from both sides that are orthogonal to the side on which the gate electrode 2A and the drain electrode 2B are provided, and ends 3A of the source electrode 3 are each provided with a recess (a notched part) 3B through which a screw 4 pierces.
In a substrate 5, a circuit pattern 5A that actuates the power FET 1 is formed and an opening 5B through which the power FET 1 is inserted is provided.
A heat sink 6 made of metal such as aluminum is provided, on a mounting surface 6B on the side opposite to a radiation fin 6A, with a mounting seat (spot facing) 7 for the height adjustment of the power FET 1 and the substrate 5 upon mounting of the power FET 1.
When the flatness of a rear surface 3C of the source electrode 3 is excellent in an ideal case, the power FET 1 is mounted in such a manner that the rear surface 3C of the source electrode 3 comes into direct contact with the heat sink 6 via the opening 5B of the substrate 5, and the power FET 1 is fixed by use of the screws 4 so that the source electrode 3 is pushed against the mounting seat 7 of the heat sink 6. The gate electrode 2A and the drain electrode 2B are soldered to the circuit pattern 5A on the substrate 5.
At this time, in general, the rear surface 3C of the source electrode 3 of the power FET has low flatness and the air enters gaps formed by micro irregularities, with the result that it is impossible to perform sufficient heat radiation only by pushing the source electrode 3 by means of the screws 4. For this reason, in many cases, a thermal conductive sheet 8 formed from an elastic member having good thermal conductivity is inserted between the source electrode 3 and the heat sink 6.
The thermal conductive sheet 8 is worked to have a shape that ensures that the thermal conductive sheet 8 comes into contact with the whole area of the rear surface 3C of the source electrode 3. In a case where as shown in FIG. 5, a thermal conductive sheet 8A does not come into contact with the whole area of the rear surface 3C of the source electrode 3 and is brought into contact with only part of the rear surface 3C of the source electrode 3, if screw torques as indicated by the arrows are applied, then because of the presence of gaps 8B, only the area of the thermal conductive sheet 8A rises due to the thickness of the thermal conductive sheet 8A. The reason why the thermal conductive sheet 8 is worked so as to come into the whole area of the rear surface 3C is that nonconformities such as damage to semiconductor chips in the interior of the power FET 1 are prevented thereby from occurring as a result of the occurrence of deformation strains in the power FET due to the gaps 8B.
In addition to such a heat radiation structure as described above, heat radiation methods, such as soldering the source electrode 3 and the heat sink 6 together or applying a thermal grease to between the source electrode 3 and the heat sink 6, have hitherto been adopted.
However, the conventional technique that involves the power FET and a heat sink are brought into electrical contact with each other via a thermal conductive sheet had the problem that the electrical properties of the power FET deteriorates due to the electric resistance of the thermal conductive sheet.
Although a member of low electric resistance is used as a thermal conductive sheet, the member is not a perfect electrical conductor. For this reason, a thermal conductive sheet has not a little electric resistance. The presence of this electric resistance promotes the feedback from the drain to gate of the FET, leading to deterioration in electrical properties, for example, an abnormal oscillation of the FET.
As a technique using a thermal conductive sheet, it is possible to consider a technique in which the shape of the thermal conductive sheet is not such that the thermal conductive sheet is provided on the whole area of the rear surface of the source electrode of a power FET and instead the thermal conductive sheet has such a small shape that the thermal conductive sheet becomes into contact with a position corresponding to the semiconductor chip portion in the interior of the FET where heat is especially concentrated. However, even with this technique, in a case where the grounding of the power FET is performed by screwing, screwed portions rise a little due to the thickness of the thermal conductive sheet and hence it is impossible to perform complete grounding. Also, if grounding is forcedly performed by the torque of screwing, the power FET will be deformed, causing problems such as the cracking of semiconductor chips in the interior of the power FET.
Incidentally, the applicant could not discover prior art literature related to the present invention other than the prior art literature specified in the information on prior art literature described in this specification until the date of application.